even more lateral fets

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#31 Re: even more lateral fets

Post by ed »

more thoughts...

have read and re-read all the TI papers by Bruce Trump. No further enlightenment at the mo, other than my best guess is still a capacitive load. From the TI papers I've taken a hint and will reduce the feedback resistors, retaining the ratio, and also remove the 47u capacitor.

I have ordered some more Exicons as it's remotely possible that the Hitachis I have in the box may be fakes, and I've also ordered some TL072s so I can do some swapping experiments....

@Nick not entirely sure how I can get an adjustable offset out of the opamp and dispense with the coupling cap. Any chance of a picture or a pointer?
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#32 Re: even more lateral fets

Post by Nick »

Well, for simplicity, put a blocking cap on the input of the op amp and use a potential dev to apply a small DC offset to the input. The offset will be multiplied by the gain of the stage and appear on the output. Though you will need the 47u back.

I did think that you have nothing to prevent the 15v gate to source voltage from being exceeded. Maybe a pair of 12v back to back zeners are worth considering.

As to the charred gate resistor, don't underestimate how much current can flow into a mosfet's gate capacitance when you get to 9MHz. May not be the case here, but it can quickly become relevant. Just ran some numbers, at 9MHz the mosfets gate will look like 30R or so.
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#33 Re: even more lateral fets

Post by ed »

I've been doing a bit more research and the web contains scant but varied info on driving fets with opamps. What I think I've found is that opamps on average don't like more that 500pf load, which puts my latfets right on the limit. I've been doing some spice sims and some models do show collapse when driving capacitance and some models don't so I'm not really sure of what I'm seeing....

however, I've been playing with this, which I hope is what you were alluding to:
opamp bias.jpg
opamp bias.jpg (148.51 KiB) Viewed 5965 times
a bit confused because the opamp doesn't do anything with the dc(i.e no gain) but it does set the offset on the output wave. But....the fets need about 5ish volts to bias and this puts the output wave into cutoff if the output positive swing gets near the supply headroom....a fine line...

any chance you can confirm I'm understanding this?
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#34 Re: even more lateral fets

Post by Nick »

Yep, the 47u will mean that there is no current at DC though that leg so the gain becomes 1 as its just the 10k between input and output. Makes sense to me, and yep, I guess thats the problem, not enough swing.

It was just a thought (not a very good one).

You could use a bipolar pair to drive the mosfet, something like

https://i.ytimg.com/vi/e_SE4KQjYR8/maxresdefault.jpg

I do something similar in my power amps, but you are getting further away from a single ended amp. LT used to do a nice buffer stage that would be ideal, but not around anymore.

There is this, that would do the job.

https://uk.farnell.com/analog-devices/l ... ?st=LT1010
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#35 Re: even more lateral fets

Post by Mike H »

Nick wrote: Fri Apr 28, 2023 11:47 am I did think that you have nothing to prevent the 15v gate to source voltage from being exceeded. Maybe a pair of 12v back to back zeners are worth considering.
That occurred to me also! I looked up the datasheet, Vgs ±15V abs max.
 
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#36 Re: even more lateral fets

Post by ed »

Mike H wrote: Fri Apr 28, 2023 10:21 pm
Nick wrote: Fri Apr 28, 2023 11:47 am I did think that you have nothing to prevent the 15v gate to source voltage from being exceeded. Maybe a pair of 12v back to back zeners are worth considering.
That occurred to me also! I looked up the datasheet, Vgs ±15V abs max.
thanks both. After Nick pointed out the gate resistance at 9mhz I realised it was only a matter of time. I don't like to assume but I'm guessing that the first time the opamp had a fit it toasted the fets and that would be why I was getting contaminated results thereafter.

I've read the lt1010 datasheet and it seems the lt1010 exists for exactly the reasons I've discovered, i.e opamps can't drive capacitive loads. I've tried the lt1010 as per the app notes in the data sheet and I've fiddled around with the capa values as mentioned, but I can't escape from the following..
lt1010 at 10k.jpg
lt1010 at 10k.jpg (179.63 KiB) Viewed 5904 times
I'm now terrified of opamps with fets and I can only guess(again) that I was extremely lucky with the first version. It's all getting a bit complicated for this naive chancer. As I will need new boards whatever happens I think I'll take a different tack and investigate a jfet front end, much like I said I would when explaining to Mike Head at the beginning of this thread. Time to take a deep breath and consider a more thoughtful approach.


edit: I've just had an afterthought. I built another amp, the pp amp using opamp front end. It's the subject of another thread, and was well accepted at Owstan as I recall. However, memory tells me that it threw a wobbler in it's first incarnation and took out my squeezebox classic. I fitted a zobel and all was good therefater, well I assumed so. I think I will dig it out and disassemble it. mea culpa magna.
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#37 Re: even more lateral fets

Post by simon »

Hi Ed, I've been watching with interest but understanding little! The gate to source protection diodes reminded me that they were added to the MoFo after a few fets had popped. Thinking of your headphone buffer I'm going to build is it worth adding back to back zeners here?

According to the ECX10N20 datasheet the max g-s voltage is +/-14V and as the buffer has a max voltage of +12V I'm guessing not. But I might have completely misunderstood!
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#38 Re: even more lateral fets

Post by ed »

weeel...anything can happen in the next half hour...

but seriously....different scenario to the opamp output....

if you bias the hpa correctly at about 1/2 V+ which will be 6v bias with a 12v v+ then you would have to i/p about 5-6v RMS signal to get the peak voltage into the gate at near max. That would be the bias voltage i.e 6v plus the peak signal voltage of around 8v. This is unlikely to happen unless you feed the HPA with a high gain pre amp.

So, the short answer is no need for back to back zeners.....

but... if the trimmer pot were to fail then all bets are off with a high gain source....

long answer would be....in my limited experience back to back zeners would not do any harm, but maybe someone else might confirm this.
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#39 Re: even more lateral fets

Post by simon »

ed wrote: Sat Apr 29, 2023 10:31 am if you bias the hpa correctly at about 1/2 V+ which will be 6v bias with a 12v v+
That's a good point actually - just to be sure the trimmer needs adjusting so the gate's at 6V?
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#40 Re: even more lateral fets

Post by ed »

simon wrote: Sat Apr 29, 2023 2:12 pm
ed wrote: Sat Apr 29, 2023 10:31 am if you bias the hpa correctly at about 1/2 V+ which will be 6v bias with a 12v v+
That's a good point actually - just to be sure the trimmer needs adjusting so the gate's at 6V?
no, not exactly....the trimmer needs adjusting so that there is 6v on the source pin, which is sitting on top of the load. Depending on the resistance of the load will determine what the fet is biased at in amps.

In this case, because it's an exicon it just happens that when you put 6-7volts on the gate the fet passes enough current to put 6v across the load. If it were an IRF fet for example, putiing about 4v on the gate might get 6v across this particular load...it's the current through the fet that we set the bias at. For a bunch of the same devices the Vgs will vary slightly to get the same current.

*****edit: My normal method is to set the output of the trimmer to ground, or near ground, before switching on for the first time. This ensures that the fet is turned off at first switch on. After the first switch on adjust the trimmer until the magic 6v is achieved.
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#41 Re: even more lateral fets

Post by simon »

Thanks Ed, glad I asked. The pcbs are in Hong Kong at the moment, so another week or so before I have them.
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#42 Re: even more lateral fets

Post by Mike H »

IMO the original is 'nearly there' - I would now look at an emitter follower between the op-amp and the FET, could have just an emitter resistor for simplicity, but would decouple the gate capacitance from the op-amp?

Protection Zener for the FET gate, after the 200R, proper job. Or could be.... :D
 
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#43 Re: even more lateral fets

Post by Mike H »

Sorry I've forgotten what mofo means again? Image
 
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#44 Re: even more lateral fets

Post by SteveH »

MOsfet FOllower?
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#45 Re: even more lateral fets

Post by Nick »

IMO the original is 'nearly there' - I would now look at an emitter follower between the op-amp and the FET, could have just an emitter resistor for simplicity, but would decouple the gate capacitance from the op-amp?
This is the sort of mental gymnastics I go through now and then and eventually get back to: "or I could just use the push pull amp I have".

Does make the valve front end that Steve is using, look like a simple solution to the problem. Maybe a Pass labs B1 would do the job between the op amp and the mosfet. Actually, the B1 would work well, could directly couple to the mosfet and the current source load in the B1 would mean that the mosfet bias could be added before the jfet buffer.
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